A phase change memory and switch (PCMS) memory array is a vertically-integrated memory cell including a phase-change memory (PCM) element layered with the ovonic threshold switch (OTS). In a PCMS memory array, tile-level detection of a snapback action has been done previously using a simple logic-level gate to detect a rise action of a wordline voltage from 0 volts (V) to 1 V. Such a detection scheme effectively limits the wordline selection voltage to 0 V.